Staff LO-Generation/PLL IC Engineer


Job Description:Job Type: Salaried Professional Technology Interest: LO Generation for Wireless Communications Who you work for:Report to Swiftlink CTO, VP of Engineering, and RFIC Director. What you will do:Well perform IC designs and simulations in Cadence, ADS, and HFSS design environment.Expertise on integrated IC system design for PLL (Dual charge-pump PLL designs, Fractional-N PLLs, spread-spectrum PLLs, Digital PLL techniques, etc.) in a wireless communication chip.Must have solid foundations and backgrounds in advanced Mm-Wave circuit techniques and circuit architectures including VCOs, PFD, Divider, PLL, Synthesizer, and LO Generation, especially for fifth generation (5G) communication design.It is also necessary for one who knows well about producing design schematic, simulation, and Mm-Wave & analog layout methodologiesExperience in analyzing link jitter budget, timing analysis and verification, and phase noise & spurs reduction. Good knowledge of LC and Ring VCO design, band gaps, bias, op-amps, LDOs, feedback compensation techniques, and digitally assisted analog circuit techniquesA proven track record of exceptional performance in the field of RF/Mm-Wave/LO circuits engineering is required.It is important to be professional and cooperative for working closely with the design teams.Engage on IC testing evaluation and work with customers on performance requirements.Further expertise or skill in large-scaled phased array transceiver architecture or beamforming technique will be a plus. Education Requirement:Ph.D. Preferred.Coursework in Microwave Engineering and Electro-magnetics. Prior Experience:5 years of industrial experience in RFIC PLL design is preferred. Tool Skills:Prior experience with RF/Mm-Wave PLL and LO Generation IC test equipment.Knowledge of EM simulation software packing, such as Ansoft HFSS, Sonnet, WIPL-D, or CSTCircuits & Systems: Microelectronics, design of analog circuits (H-SPICE, Laker ADP), mixed-mode circuits (Cadence Virtuoso, Verilog), digital VLSI systems (Verilog HDL), ADS. Language Skills:English fluency required Submission Requirements:Name, Email, Phone Number, Resume
SwiftLink Technologies INC

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